■INT 00-17h: CPU exceptions, external interrupts

Terminology SMM
SMM (System Management Mode) is supported by i386SL (98), i486SX (J), i486DX (J), SL Enhanced type i486,
and Pentium processors. It can be used when you want to control the system (such as power management) independently of the OS.
CPUs that support SMM are equipped with an external interrupt called SMI (System Management Interrupt).
SMI has a higher priority than NMI (Non Maskable Interrupt). When an SMI occurs, the CPU transitions to System Management Mode (SMM).
In the PC-9800, the 98NOTE, which is equipped with a CPU that supports SMM, uses SMM for power management, etc.
For the CPUs installed in each model, see "CPU List" (p. 14). Desktop models do not use SMM.

INT 00h (CPU exception)
Classification CPU EXCEPTION
Name Division error
Target i8086 or later, V30, V30HL, V33A, V50
Explanation o BIOS does not handle this interrupt.
o When MS-DOS is running, it points to the inside of MSDOS.SYS. When INT 00h is issued, the process is forcibly terminated with the message "Division by 0."
u PC-9801NS/E, NC, and NS/T cannot resume normally when the lower 8 bits of the offset of the vector address pointed to by INT 00h are 55h or AAh.
Related List by CPU

INT 01h (CPU exception)
Classification CPU EXCEPTION
Name Single step
Target i8086 or later, V30, V30HL, V33A, V50
Explanation o BIOS and MS-DOS do not handle this interrupt.
Related List by CPU

INT 02h (CPU exception)
Classification CPU EXCEPTION
Name NMI (Non Maskable Interrupt)
Target i8086 or later, V30, V30HL, V33A, V50
Explanation o The cause of NMI varies depending on the model as follows.
o ■Normal (except PC-9801U), high resolution
NMI occurs at the falling edge of the IOCHK0 signal on the expansion bus.
It is used to detect parity errors in the additional RAM installed in the expansion slot.
NMI occurrence can be masked with I/O 0050h, 0052h. I/O 0033h bit 1 can be used to check
whether an extended RAM parity error has occurred.
When an NMI occurs, the BIOS NMI handler displays the words "PARITY ERROR - EXTENDED MEMORY" in red
in the upper left corner of the screen and enters an infinite loop.
The PC-9801U does not have this function.
o ■Models with parity in the built-in RAM
If a parity error is detected in the built-in RAM (including RAM in a dedicated memory slot), an NMI occurs.
NMI occurrences can be masked with I/O 0050h and 0052h. Whether an internal RAM parity error has occurred can be checked with I/O 0033h bit 2.
If an NMI occurs, the BIOS's NMI handler will display "PARITY ERROR - BASE MEMORY" or
similar in red in the upper left corner of the screen and enter an infinite loop.
u ■98NOTE with resume support and no SMM (Undocumented)
When resume is ON, an NMI occurs during a specific I/O write. This is used to save output data to I/O.
When a RAM parity error occurs, a parity error notification is also displayed.
When resume is OFF, only a parity error notification is displayed.
For 98NOTEs with SMM, only a parity error notification is displayed.
u ■PC-9801LV･N (Undocumented)
An NMI occurs when an extended RAM parity error or a low battery occurs.
The NMI handler checks the low battery status at I/O 8810h, and if it is low battery, it sets 0000:0480h bit 2=1 and beeps on.
The PC-9801UV11･CV, which shares the same BIOS as the PC-9801LV, also has a similar routine, but it does not cause a low battery.
The PC-9801NS only handles RAM parity error notifications.
u ■PC-98LT (Undocumented)
An NMI occurs when the power switch is turned off. When the NMI handler confirms that the power switch is off at I/O 8810h,
it sets 0000:04F8h bit 7=1. It then issues INT 1Fh - Function 8Ch. If it returns with CF=0, it sets 0000:04F8h bit 6=1.
The system interrupt (INT 0Ah) handler checks this bit and performs the power-off process.
u ■PC-98HA (Undocumented)
When the power switch is pressed, an NMI occurs. When the NMI handler confirms at I/O 8810h that the power switch is pressed,
it sets 0000:04F8h bit 7=1 and returns. The system interrupt (INT 0Ah) handler checks this bit and performs the power-off process.
o ■PC-H98
In addition to when an internal RAM parity error is detected and when the IOCHK0 signal of the expansion bus falls,
an NMI also occurs when a specific state times out, a bus timeout occurs, or when the power switch is pressed.
Related I/O 0050h
I/O 0052h
I/O 0033h bit 2,1

INT 03h (CPU exception)
Classification CPU EXCEPTION
Name Breakpoint
Target i8086 and later, V30, V30HL, V33A, V50
Explanation o BIOS and MS-DOS do not handle this interrupt.
Related

INT 04h (CPU exception)
Classification CPU EXCEPTION
Name INTO Overflow detection
Target i8086 and later, V30, V30HL, V33A, V50
Explanation o BIOS and MS-DOS do not handle this interrupt.
Related

INT 05h (Keyboard BIOS)
Classification KEYBOARD BIOS
Name User routine when COPY key is pressed
Target Normal, Hi-Res, PC-98LT/HA
Explanation o When [COPY] is pressed, the keyboard interrupt handler (INT 09h) executes INT 05h. The BIOS does not handle this interrupt.
Drivers and user programs can replace the INT 05h processing routine.
o In MS-DOS, the printer driver (PRINT.SYS, etc.) usually handles it.
o In Hi-Res mode, the key that generates INT 05h can be changed.
In PC-98LT, INT 05h is generated by pressing [CTRL]+[SHIFT]+[P].
Related 0000:0418-041Bh [Hi-Res]

INT 05h (CPU exception)
Classification CPU EXCEPTION
Name BOUND Boundary check
Target i80186 and later, V30, V30HL, V33A, V50
Explanation o BIOS does not take this exception into consideration.
o When using the original function of INT 05h on PC-9800, it is necessary to distinguish it from pressing the COPY key in the interrupt handler.
If the return address in the stack is immediately before the INT 05h instruction, it can be determined that it is a COPY key interrupt.
If not, it will jump to the original INT 05h processing.
Related

INT 06h (Keyboard BIOS)
Classification KEYBOARD BIOS
Name User routine when STOP key is pressed
Target Normal, Hi-Res, PC-98LT/HA
Explanation o When [STOP] is pressed, the keyboard interrupt handler (INT 09h) executes INT 06h. BIOS does not handle this interrupt.
Drivers and user programs can replace the INT 06h processing routine.
o In MS-DOS, IO.SYS handles it. The handler performs the following process.
1. When [SHIFT] is not pressed at the same time
a. Flush the key buffer
b. Set ^C to the key buffer
c. Retract the hard disk
d. Set the display character color to the default (escape sequence ESC+"[m")
2. When [SHIFT] is pressed at the same time
a. Flush the key buffer
b. Set ^S to the key buffer
o In high-resolution mode, the key that generates INT 05h can be changed.
Related 0000:0418-041Bh [High-resolution]

INT 06h (CPU exception)
Classification CPU EXCEPTION
Name Invalid instruction
Target i80186 or later, V33A
Explanation o The BIOS does not take this exception into account.
o When using the original function of INT 06h on the PC-9800, it is necessary to distinguish it from pressing the STOP key in the interrupt handler.
If the return address in the stack is immediately preceded by an INT 06h instruction, it can be determined that it is a STOP key interrupt.
Related

INT 07h (Timer BIOS)
Classification TIMER BIOS
Name Interval timer user routine
Target Normal (excluding PC-98DO+), High-resolution, PC-98LT/HA
Explanation o In normal mode and PC-98LT/HA, if you set an interval timer with INT 1Ch - Function 02h, the user routine for timeout is set in this vector.
When a timeout occurs, the interval timer handler (INT 08h) executes INT 07h to call the user routine.
o In high-resolution mode, if you set a multi-event compatible interval timer with INT 1Ch - Function 04h, 05h, this vector is used to call the user routine when a timeout occurs.
o In PC-98DO+, the timer BIOS user routine is placed in 0000:044C-044Fh to skip coprocessor instructions. (Undocumented)
Related 0000:044C-044Fh [Hi-Res, PC-98DO+]
INT 1Ch - Function 02h
INT 1Ch - Function 04h
INT 1Ch - Function 05h

INT 07h (CPU exception)
Classification CPU EXCEPTION
Name Absence of coprocessor
Target i80286 and later, V33A
Explanation o BIOS other than PC-98DO+ does not take this exception into consideration.
u The BIOS of PC-98DO+ (using V33A) has an emulation routine to skip coprocessor instructions. (Undocumented)
Related

INT 08h (External interrupt)
Classification EXTERNAL INTERRUPT
Name Timer interrupt
Target Normal, High-resolution, PC-98LT/HA
Explanation o External interrupt for timer (8253A).
Handled by timer BIOS.
o IR0 input of master interrupt controller (8259A).
u PC-98LT/HA uses the V50's built-in TCU (Timer Control Unit) for the timer and the V50's built-in ICU (Interrupt Control Unit) for the interrupt controller.
The I/O addresses of the TCU and ICU are compatible with normal mode.
Related INT 1Ch - Function 02h
INT 1Ch - Function 04h
INT 1Ch - Function 05h
I/O 0002h bit 0
I/O 0071h

INT 08h (CPU exception)
Classification CPU EXCEPTION
Name Double fault
Target i80286 and later
Explanation o The BIOS does not take this exception into account.
Related

INT 09h (External interrupt)
Classification EXTERNAL INTERRUPT
Name Keyboard interrupt
Target Normal, high resolution, PC-98LT/HA
Explanation o External interrupt for keyboard (8251A). Occurs when data is received from the keyboard.
Handled by the keyboard BIOS.
o IR1 input of the master interrupt controller (8259A).
Related INT 05h
INT 06h
INT 18h - Function 00h
I/O 0002h bit 1

INT 09h (CPU exception)
Classification CPU EXCEPTION
Name Coprocessor segment overrun
Target i80287, i80387
Explanation o The BIOS does not take this exception into account.
Related

INT 0Ah (External interrupt...VSYNC)
Classification EXTERNAL INTERRUPT
Name CRT vertical synchronization (VSYNC) interrupt
Target Normal, high resolution
Explanation o An interrupt that occurs in sync with the CRT vertical synchronization signal.
Used when processing synchronized with VSYNC is required, such as smooth scrolling of a text screen.
INT 18h - Function 0Ah, 0Eh, 0Fh, 10h, 14h, 1Ah, 1Ch, 1Dh, 1Eh, 1Fh, 20h use this interrupt to
perform processing during the vertical synchronization period.
MS-DOS does not handle this interrupt.
o IR2 input of the master interrupt controller (8259A).
o When OUT is sent to I/O 0064h, an interrupt occurs only once at the next vertical synchronization.
If it is necessary to generate interrupts continuously, it is necessary to OUT to I/O 0064h again within the INT 0Ah handler.
o The BIOS uses this interrupt when executing the above function of INT 18h, but returns the vector address to its original state when the processing is complete.
For this reason, this interrupt can be used in place of an interval timer in a TSR, etc., but the following points must be noted.
When the above function of INT 18h is executed, the next INT 0Ah interrupt will be monopolized during processing.
Also, since I/O 0064h is not output after the interrupt occurs, INT 0Ah will not continue to be generated.
It is necessary to take measures such as outputting I/O 0064h after the above function of INT 18h is executed.
o The vertical sync frequency of a CRT differs depending on the CRT resolution, etc.

Table: List of vertical sync frequencies and how to distinguish them
--+--------------+---------------+-------------+-----+-----+-----+-----+-----
|CRT resolution|Horizontal scan|Vertical sync|0000:|0000:|0000:|0000:|0000:
| | Frequency | Frequency |0459h|0459h|0501h|053Ch|054Ch
| | | |bit 3|bit 0|bit 3|bit 7|bit 5
--+--------------+---------------+-------------+-----+-----+-----+-----+-----
*1|640x200 |15.98kHz |61.47Hz | x | x | 0 | 0 | x
*2|640x400 |24.83kHz |56.42Hz | x | x | 0 | 1 | 0
*3|640x400 |31.47kHz |70.10Hz | x | 0 | 0 | 1 | 1
*4|640x480 |31.47kHz |59.94Hz | x | 1 | 0 | 1 | 1
*5|1120x750 |32.86kHz |79.09Hz | 0 | x | 1 | x | x
*6|1120x750 |50.02kHz |60.05Hz | 1 | x | 1 | x | x
*7|640x480 |15.73kHz |59.94Hz | x | x | 0 | 1 | 0
--+--------------+---------------+-------------+-----+-----+-----+-----+-----
*1: Models with digital RGB output, DIP SW CRT signal when 1-1 is OFF.
Setting when connecting a PC-8001 display.
*2: The most standard CRT signal in normal mode.
On the PC-9801NS/R, P and NL/R, when the power save state is entered the GDC clock is halved and at the same time the VSYNC frequency is halved.
However, even if the power save mode is set to be used, the power save state will not be entered in the following cases.
o PC-9801NS/R...・AC adapter is connected
・Expansion device is connected to the expansion bus connector
・CRT pack is connected (CPU goes into power saving state, but GDC clock and VSYNC frequency do not change)
o PC-9801P ……・AC adapter is connected
・Expansion connector box is connected
o PC-9801NL/R...・AC adapter is connected
*3: Normal mode CRT signal when [GRPH]+[2]+[RESET] is set for PC-9821Ap･As･Ae･Af･Ap2･As2･Bf･Bp･Bs･Be･Cs2･Ce2,
PC-9801BA2･BS2･BX2, and when N5926-01･02 type display is connected to PC-H98 and 25 lines are not displayed with space between lines.
PC-9821Ce can be set in BIOS. Cannot be set for PC-9821Ne/Ts.
*4: CRT signal in normal mode when displaying 640x480 on PC-9821 (excluding Bf/Bp/Bs/Be/Ts) and PC-98GS,
and when displaying 25 lines with space between lines with an N5926-01/02 type display connected to a PC-H98.
*5: CRT signal (interlaced) when setting [GRPH]+[1]+[RESET] in high-resolution mode of PC-98XA/XL/RL,
high-resolution mode when an N5926-01 type display is connected to a PC-H98, or high-resolution mode of
PC-9821Ap/As/Ae/Af/Ap2/As2 + 98 high-resolution board (PC-9821A-E02).
*6: CRT signal (non-interlaced) in high-resolution mode when an N5926-02 display is connected to a PC-H98,
and when the [GRPH]+[2]+[RESET] settings are made in high-resolution mode on a PC-9821Ap/As/Ae/Af/Ap2/As2 + 98 high-resolution board (PC-9821A-E02).
*7: CRT signal when set to video mode on a PC-98GS.
From the state of the system common area, it cannot be distinguished from the state of a vertical sync frequency of 56.42 Hz.
Related INT 18h - Function 2Ah
INT 18h - Function 30h
I/O 0002h bit 2
I/O 0064h
I/O 498Eh bit 0[PC-9801NS/R･P･NL/R]

INT 0Ah (External interrupt...LT･HA)
Classification EXTERNAL INTERRUPT
Name System interrupt
Target PC-98LT･HA
Explanation o External interrupt for V50 built-in timer (TCU) channel 1. The interrupt period is as follows:
PC-98LT...10Hz
PC-98HA...40Hz
o Handled by BIOS. Used for blinking cursor and power management, etc.
o INTP2 input of V50 built-in ICU.
Related I/O 0002h bit 2

INT 0Ah (CPU exception)
Classification CPU EXCEPTION
Name Invalid task state segment
Target i80286 and later
Explanation o Does not occur in real mode.
Related

INT 0Bh (External interrupt)
Classification EXTERNAL INTERRUPT
Name Expansion bus INT0
Target Normal, Hi-Res
Explanation o An interrupt request occurs when the IR31 signal of the expansion bus rises.
o IR3 input of the master interrupt controller (8259A).
Related I/O 0002h bit 3

INT 0Bh (CPU exception)
Classification CPU EXCEPTION
Name Absent segment
Target i80286 or later
Explanation o Does not occur in real mode.
Related

INT 0Ch (External interrupt...RS-232C)
Classification EXTERNAL INTERRUPT
Name RS-232C (channel 0) interrupt
Target Normal, Hi-Res, PC-98LT/HA
Explanation o External interrupt of RS-232C (8251A).
Handled by RS-232C BIOS. When RSDRV.SYS is installed, RSDRV.SYS handles it.
o IR4 input of the master interrupt controller (8259A).
u In the case of PC-98LT･HA, the V50 built-in SCU (Serial Control Unit) is not used because it is not compatible with normal mode.
It has an external 8251A USART, which is compatible with normal mode.
Related I/O 0002h bit 4
I/O 0030h
I/O 0035h bit 2〜0

INT 0Ch (External interrupt...NESA)
Classification EXTERNAL INTERRUPT
Name NESA bus (E bus) INT7
Target PC-H98
Explanation o Can be used when interrupts are set to shareable in level mode.
An interrupt request occurs when the IRQ7 signal of the NESA bus (E bus) is at LOW level.
Related I/O 0002h bit 4
INT 1Fh - Function C4h

INT 0Ch (CPU exception)
Classification CPU EXCEPTION
Name Stack fault
Target i80286 and later
Explanation o Does not occur in real mode
Related

INT 0Dh (External interrupt)
Classification EXTERNAL INTERRUPT
Name Expansion bus INT1
Target Normal, high-resolution
Explanation o An interrupt request occurs when the IR51 signal of the expansion bus rises.
o IR5 input of the master interrupt controller (8259A).
Related I/O 0002h bit 5

INT 0Dh (CPU exception)
Classification CPU EXCEPTION
Name General protection fault
Target i80286 and later
Explanation o The BIOS does not take this exception into account.
Related

INT 0Eh (External interrupt...bus)
Classification EXTERNAL INTERRUPT
Name Expansion bus INT2, Built-in mouse I/F (high-resolution)
Target Normal (except PC-9801NS/NV/NS/E/NC), high-resolution
Explanation o An interrupt request occurs when the IR61 signal of the expansion bus rises.
o IR6 input of the master interrupt controller (8259A).
u In high-resolution mode, this is used for the mouse timer interrupt. The interrupt number cannot be changed on models other than the PC-H98.
If you mask the mouse timer interrupt with I/O 0065h bit 4, you can use the interrupt input from the expansion bus.
Related INT 1Fh - Function C5h [PC-H98]
I/O 0002h bit 6
I/O 0061h [High-resolution]

INT 0Eh (External interrupt...LT/HA)
Classification EXTERNAL INTERRUPT
Name FDC interrupt
Undocumented
Target PC-98LT/HA
Explanation o Interrupt for the FDC (Floppy Disk Controller) for the built-in FDD of the PC-98LT and the FDD built into the docking station of the PC-98HA.
o INTP6 input of the V50 built-in ICU.
Related I/O 0002h bit 6

INT 0Eh (External interrupt...98NOTE)
Classification EXTERNAL INTERRUPT
Name System interrupt
Undocumented
Target PC-9801NS/NV/NS/E/NC
Explanation o System management interrupt that occurs at 10Hz.
Handled by BIOS. Used to stop the hard disk motor and manage power supply.
o IR6 input of master interrupt controller (8259A).
o PC-9801NS/T does not use system interrupts.
Related I/O 0002h bit 6
INT 17h (External interrupt...98NOTE)

INT 0Eh (External interrupt...98Pen)
Classification EXTERNAL INTERRUPT
Name Tablet interrupt
Target PC-9801P
Explanation o An interrupt that occurs when the tablet detects a pen.
It occurs in response to the IR6 input of the master interrupt controller (8259A).
o Handled by PenBIOS.
Related INT 1Fh - Function 9B00h
I/O 0002h bit 6

INT 0Eh (CPU exception)
Classification CPU EXCEPTION
Name Page fault
Target i386 and later
Explanation o Does not occur in real mode
Related

INT 0Fh (External interrupt)
Classification EXTERNAL INTERRUPT
Name 8259A incomplete interrupt
Undocumented
Target Normal, Hi-Res, PC-98LT/HA
Explanation o Occurs when an incomplete interrupt occurs in the master interrupt controller.
o In normal and Hi-Res, a slave interrupt controller is connected to the IR7 input of the master interrupt controller (8259A).
o PC-98LT/HA does not have a slave interrupt controller.
Related I/O 0002h bit 7

INT 10-17h (External interrupt)
Classification EXTERNAL INTERRUPT
Name Interrupt actually generated by the V50 built-in ICU
Undocumented
Target PC-98HA
Explanation o In PC-98HA, the interrupt levels actually generated by the V50 built-in ICU are INT 10-17h.
After performing processes such as power OFF prohibition, INT 08-0Fh is executed to start each interrupt handler.
o In PC-98LT, the V50's built-in ICU generates interrupt levels INT 08-0Fh directly.
Related I/O 0000h
0000:0456h

INT 10h (External interrupt)
Classification EXTERNAL INTERRUPT
Name Printer
Target Normal + i8086/V30
Explanation o Connected to port C bit 3 of the 8255A built-in printer interface. Due to the circuit configuration, it cannot be used effectively.
o IR0 input of the slave interrupt controller (8259A).
Related I/O 000Ah bit 0
I/O 0044h bit 3

INT 10h (CPU exception)
Classification CPU EXCEPTION
Name Coprocessor error
Target i80287 and later
Explanation o The BIOS does not take this exception into account.
Related

INT 11h (External interrupt)
Classification EXTERNAL INTERRUPT
Name Expansion bus INT3, Built-in SASI/IDE I/F
Target Normal, High-resolution
Explanation o An interrupt request occurs when the IR91 signal on the expansion bus rises.
o IR1 input of the slave interrupt controller (8259A).
o Used by SASI HD I/F (PC-9801-07/27 and built-in type) and IDE I/F. Interrupt numbers cannot be changed on these interfaces.
Related I/O 0033h bit 4 (Normal)
I/O 000Ah bit 1

INT 11h (CPU exception)
Classification CPU EXCEPTION
Name Alignment check
Target i486 and later
Explanation o The BIOS does not take this exception into account.
Related

INT 12h (External Interrupt)
Classification EXTERNAL INTERRUPT
Name Expansion bus INT41, Built-in FDC (640KB I/F mode)
Target Normal, High-Resolution
Explanation o An interrupt request occurs when the IR101 signal of the expansion bus rises.
o IR2 input of the slave interrupt controller (8259A).
o Used by dual-purpose built-in drives (in 640KB I/F mode) and PC-9801-08/09 (mini floppy disk interface board). The interrupt number cannot be changed with these interfaces.
Related I/O 000Ah bit 2

INT 12h (CPU Exception)
Classification CPU EXCEPTION
Name Machine Check
Target Pentium processor
Explanation o The BIOS does not take this exception into account.
Related

INT 13h (External interrupt)
Classification EXTERNAL INTERRUPT
Name Expansion bus INT42, Built-in FDC (1MB I/F mode)
Target Normal, High-resolution
Explanation o An interrupt request occurs when the IR111 signal of the expansion bus rises.
o IR3 input of the slave interrupt controller (8259A).
o Used by dual-purpose built-in drives (in 1MB I/F mode) and PC-9801-15 (8-inch standard floppy disk interface board). The interrupt number cannot be changed in these interfaces.
Related I/O 000Ah bit 3

INT 13h (External interrupt...NESA)
Classification EXTERNAL INTERRUPT
Name NESA bus (E bus) INT8
Target PC-H98
Explanation o Can be used when the interrupt is set to shareable in level mode.
An interrupt request occurs when the IRQ8 signal of the NESA bus (E bus) is at a LOW level.
Related I/O 000Ah bit 3
INT 1Fh - Function C4h

INT 14h (External interrupt)
Classification EXTERNAL INTERRUPT
Name Expansion bus INT5, built-in sound function
Target Normal, high-resolution
Explanation o An interrupt request occurs when the IR121 signal of the expansion bus rises.
o IR4 input of the slave interrupt controller (8259A).
o Used by the built-in sound function and sound board (PC-9801-26/86).
In machines with built-in sound function, the interrupt number cannot be changed.
In some models, the sound function itself can be disconnected, in which case the interrupt is also released.
The interrupt number can be changed for sound boards.
Related I/O 000Ah bit 4

INT 15h (External Interrupt)
Classification EXTERNAL INTERRUPT
Name Expansion bus INT6, Built-in mouse I/F (Normal)
Target Normal, High-Resolution
Explanation o An interrupt request occurs at the rising edge of the IR131 signal on the expansion bus.
o IR5 input of the slave interrupt controller (8259A).
u In normal mode, this is used for the mouse timer interrupt (default number).
The interrupt number cannot be changed on some models. For the PC-H98, it can be changed in the system setup.
Even if the interrupt number is fixed on a model, you can use the interrupt input from the expansion bus by masking the mouse timer interrupt with I/O 0065h bit 4.
Related INT 1Fh - Function C5h [PC-H98]
I/O 000Ah bit 5
7FDDh bit 4 [Normal]

INT 16h (External interrupt...i8087)
Classification EXTERNAL INTERRUPT
Name i8087 interrupt
Target Normal + i8086/V30
Explanation o i8087 interrupt.
o IR6 input of slave interrupt controller (8259A).
Related I/O 000Ah bit 6

INT 16h (External interrupt...NOTHING)
Classification EXTERNAL INTERRUPT
Name Not used
Target Normal (other than PC-H98) + i80286 or later
Explanation o Not used when operating in normal mode with a CPU of i80286 or later.
Related I/O 000Ah bit 6

INT 16h (External interrupt...PRINTER)
Classification EXTERNAL INTERRUPT
Name Full Centronics printer I/F
Target Hi-Res, PC-H98
Explanation o Used when Hi-Res mode and PC-H98 normal mode are set to Full Centronics mode.
In the Full Centronics printer I/F, port A of the 8255A is used in mode 1. When transmission of one byte is completed, the 8255A generates this interrupt request.
o IR6 input of the slave interrupt controller (8259A).
Related I/O 000Ah bit 6
I/O 0040h
INT 1Ah - Function 17h

INT 16h (External interrupt...NESA)
Classification EXTERNAL INTERRUPT
Name NESA bus (E bus) INT9
Target PC-H98
Explanation o Can be used when interrupts are set to shareable in level mode.
An interrupt request occurs when the IRQ9 signal on the NESA bus (E bus) is at a LOW level.
Related I/O 000Ah bit 6
INT 1Fh - Function C4h

INT 17h (External interrupt...8259A)
Classification EXTERNAL INTERRUPT
Name 8259A incomplete interrupt
Undocumented
Target Normal, high resolution
Explanation o Occurs when an incomplete interrupt occurs in the slave interrupt controller.
o IR7 input of the slave interrupt controller (8259A). Except for some models that use INT 17h, the IR7 input is connected to GND.
Related I/O 000Ah bit 7

INT 17h (External interrupt...98NOTE)
Classification EXTERNAL INTERRUPT
Name System interrupt
Undocumented
Target PC-9801NL･NS/L･NA･NS/R･P･NX/C･NS/A･NL/R, PC-9821Ne
Explanation o System management interrupt that occurs at a cycle of 10Hz.
Handled by the BIOS. Used for stopping the hard disk motor and managing the power supply, etc.
o IR7 input of the slave interrupt controller (8259A).
o PC-9801NS/T does not use system interrupts.
Related I/O 000Ah bit 7
INT 0Eh (External interrupt...98NOTE)

INT 17h (External interrupt...IDE)
Classification EXTERNAL INTERRUPT
Name IDE motor stop timer
Applicable PC-9801BA2･BS2･BX2, PC-9821Ap2･As2･Bf･Bp･Bs･Be･Cs2･Ce2･Ts
(IDE-equipped desktop models with HD motor control function)
Explanation o Used when "Setting the control of the built-in fixed disk" is selected in the system setup menu. Generated at a cycle of 10Hz.
o IR7 input of the slave interrupt controller (8259A).
Related I/O 000Ah bit 7
0000:0598h
0000:059Ah
0000:05B1h
INT 1Bh - Function E0h (IDE)
INT 1Bh - Function F0h (IDE)

INT 17h (External interrupt...NESA)
Classification EXTERNAL INTERRUPT
Name System timer, NESA bus (E bus) INT10
Target PC-H98
Explanation o System timer interrupt for PC-H98. No information about the system timer is disclosed other than its existence. Normally, the BIOS does not handle it.
o INT10 can be used when the interrupt is set to level mode and sharing is enabled.
An interrupt request occurs when the IRQ10 signal on the NESA bus (E bus) is at a LOW level.
Related I/O 000Ah bit 7
INT 1Fh - Function C4h